AMD Ryzen 4000 Zen 3 header image

AMD’s upcoming ZEN 3 Ryzen 4000 “Vermeer” series of processors might come in 10-core SKU flavors


During the latest earnings call for the second quarter of 2020, AMD reaffirmed its plans to introduce Zen 3-based Ryzen 4000 client Desktop CPUs and RDNA 2-based Navi 2X GPUs in the second half of 2020. This means Zen 3 and Navi 2x product lineup from AMD is on track. The next-generation Ryzen 4000 series of desktop processors are based on the Zen 3 architecture, and these processors are codenamed as Vermeer.

Vermeer series of processors will feature a new Zen 3 CPU architecture, bringing big changes to AMD’s core designs as well. This may definitively help with higher single-threaded and multi-threaded IPC boosts. When combined this with higher clock speeds we can expect significant performance gains.

We now have some more info on this Zen 3 lineup.  According to Yuri Bubliy (@1usmus), the creator of the DRAM calculator for Ryzen and ClockTuner for Ryzen (a semi-automatic tool to find the best CCX in Ryzen processors), the next-gen Zen 3 CPUs will feature 10-core SKUs. The data is already present in the current AGESA 1.0.8.1 microcode, and Yuri has confirmed the same. Assuming Yuri’s claims are true, then we might get 5+5 Zen CCX configuration CPUs. AMD might be planning to compete with Intel’s 10th Gen Core CPU lineup, and even future processors.

Yuri has shared some more info as well. One of the key features of Zen 3 will be the support for a ‘Curve Optimizer’. This feature will allow you to configure the boost of the Ryzen processor. In addition, you will also be able to customize the frequency for each core without any restrictions. AMD Ryzen Master tool already provides a lot of features when it comes to overclocking and undervolting the CPU, and there seems to be more headroom left.

Lastly, Zen 3 processors will feature ‘Infinity Fabric dividers’. What this means is that you can get the memory controller frequency slightly higher in mixed mode, and thus should provide more flexibility to the memory controller frequency configurations, such as mixed mode. The microcode in the BIOS also features the Infinity Fabric dividers. There also appears to be mention of a uniform load on CCD’s with each CCD getting an equal proportion of cores, like for example 10 (5+5), 12 (6+6), 16 (8+8) variants.

The Zen 3 processors are also going to feature a combined and a unified L3 cache for each Zen 3 chiplet. This will make L3 cache access times more feasible across the entire Zen 3 chiplet. Larger cache sizes could mean longer cache latencies, and this is true for Zen 3 CPUs. The CPU cores can now share the information more easily. Larger cache sizes could help with boosting Zen 3’s multi-threaded, as well as Gaming performance.

The previous gen Zen 2 CPUs already featured double the L3 cache over the Zen/Zen+ series chips, and ZEN 3 is going to take things to a whole new level. AMD’s next-generation Zen 3 architecture aims to alleviate some of the shortcomings of AMD’s existing architecture designs. When the Ryzen 3000 series were launched, AMD aggressively marketed Zen 2’s cache design changes, such as the gamecache feature, to highlight the performance jump in Gaming benchmarks. With Zen 3’s new cache changes each CPU core will have even faster access to a larger pool of the L3 cache.